1. Field of the Invention
The present invention relates to a solid-state imaging device and a method for manufacturing the solid-state imaging device, and an electronic device such as a camera which is equipped with the solid-state imaging device.
2. Description of the Related Art
As a solid-state imaging device, a CMOS solid-state imaging device is used. The CMOS solid-state imaging device has a low power-source voltage and consumes less power so as to be used in a digital still camera, a digital video camera, various mobile terminal devices such as a camera-equipped mobile phone, and the like.
The CMOS solid-state imaging device includes a pixel region in which a plurality of pixels are two-dimensionally arranged in a regular manner and a peripheral circuit portion which is disposed around the pixel region. Each of the pixels is composed of a photodiode which is a photoelectric conversion portion and a plurality of pixel transistors. The peripheral circuit portion includes a row circuit (vertical driving unit) for propagating a signal in a row direction, a horizontal circuit (horizontal transfer unit) for sequentially transmitting a signal of each row propagated by the row circuit to an output circuit, and the like. The plurality of pixel transistors have a three-transistor configuration which includes a transfer transistor, a reset transistor, and an amplification transistor, or have a four-transistor configuration which includes the above three transistors and a selection transistor, for example.
In a common CMOS solid-state imaging device, a plurality of unit pixels each of which is composed of one photodiode and a plurality of pixel transistors are arranged. A pixel size has been made smaller in recent years, so that a so-called pixel sharing CMOS solid-state imaging device is developed. In the pixel sharing CMOS solid-state imaging device, a pixel transistor is shared by a plurality of pixels so as to reduce the number of pixel transistors per unit pixel and enlarge a photodiode area (refer to Japanese Unexamined Patent Application Publication No. 2006-54276 and Japanese Unexamined Patent Application Publication No, 2009-135319).
At the same time, in a CMOS solid-state imaging device, a p-type semiconductor well region is formed on an n-type semiconductor substrate, for example, and a plurality of pixels are formed in a part, which corresponds to a pixel region, of the p-type semiconductor well region. Then, well potential is applied through a well contact portion to the p-type semiconductor well region so as to stabilize well potential (refer to Japanese Unexamined Patent. Application Publication No. 2006-269546, Japanese Unexamined Patent Application Publication. No. 2006-73567, and Japanese Unexamined Patent Application Publication No. 2006-86232).